Menu
0
Total price
0 €
PRICES include / exclude VAT
Homepage>BS IEC 62047-31:2019 Semiconductor devices. Micro-electromechanical devices Four-point bending test method for interfacial adhesion energy of layered MEMS materials
Sponsored link
sklademVydáno: 2019-04-17
BS IEC 62047-31:2019 Semiconductor devices. Micro-electromechanical devices Four-point bending test method for interfacial adhesion energy of layered MEMS materials

BS IEC 62047-31:2019

Semiconductor devices. Micro-electromechanical devices Four-point bending test method for interfacial adhesion energy of layered MEMS materials

Format
Availability
Price and currency
Anglicky Secure PDF
Immediate download
183.40 €
You can read the standard for 1 hour. More information in the category: E-reading
Reading the standard
for 1 hour
18.34 €
You can read the standard for 24 hours. More information in the category: E-reading
Reading the standard
for 24 hours
55.02 €
Anglicky Hardcopy
In stock
183.40 €
Označení normy:BS IEC 62047-31:2019
Počet stran:16
Vydáno:2019-04-17
ISBN:978 0 580 96660 6
Status:Standard
DESCRIPTION

BS IEC 62047-31:2019


This standard BS IEC 62047-31:2019 Semiconductor devices. Micro-electromechanical devices is classified in these ICS categories:
  • 31.080.99 Other semiconductor devices
IEC 62047-31:2019 (E) specifies a four-point bending test method for measuring interfacial adhesion energy of the weakest interface in the layered micro-electromechanical systems (MEMS) based on the concept of fracture mechanics. In a variety of MEMS devices, there are many layered material interfaces, and their adhesion energies are critical to the reliability of the MEMS devices. The four-point bending test utilizes a pure bending moment applied to a test piece of layered MEMS device, and the interfacial adhesion energy is measured from the critical bending moment for the steady state cracking in the weakest interface. This test method applies to MEMS devices with thin film layers deposited on semiconductor substrates. The total thickness of the thin film layers should be 100 times less than the thickness of a supporting substrate (typically a silicon wafer piece).