Menu
0
Total price
0 €
PRICES include / exclude VAT
Homepage>PD IEC/TR 63051:2017 Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)
sklademVydáno: 2017-01-10
PD IEC/TR 63051:2017 Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)

PD IEC/TR 63051:2017

Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)

Format
Availability
Price and currency
Anglicky Secure PDF
Immediate download
179.46 €
You can read the standard for 1 hour. More information in the category: E-reading
Reading the standard
for 1 hour
17.95 €
You can read the standard for 24 hours. More information in the category: E-reading
Reading the standard
for 24 hours
53.84 €
Anglicky Hardcopy
In stock
179.46 €
Označení normy:PD IEC/TR 63051:2017
Počet stran:20
Vydáno:2017-01-10
ISBN:978 0 580 93916 7
Status:Standard
DESCRIPTION

PD IEC/TR 63051:2017


This standard PD IEC/TR 63051:2017 Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath) is classified in these ICS categories:
  • 35.240.50 IT applications in industry
  • 25.040.01 Industrial automation systems in general

A hardware description language provides a means to describe the behavior of a system precisely and concisely. This document describes the main functional requirements for an HDLMath language and compares existing HDLMath languages from the viewpoint of designers. It is intended to accelerate the standardization of a mathematical algorithm design language and to help establish a new and good system modeling and verification environment.