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Hlavní stránka>PD IEC/TR 63051:2017 Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)
sklademVydáno: 2017-01-10
PD IEC/TR 63051:2017 Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)

PD IEC/TR 63051:2017

Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)

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Označení normy:PD IEC/TR 63051:2017
Počet stran:20
Vydáno:2017-01-10
ISBN:978 0 580 93916 7
Status:Standard
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PD IEC/TR 63051:2017


This standard PD IEC/TR 63051:2017 Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath) is classified in these ICS categories:
  • 35.240.50 IT applications in industry
  • 25.040.01 Industrial automation systems in general

A hardware description language provides a means to describe the behavior of a system precisely and concisely. This document describes the main functional requirements for an HDLMath language and compares existing HDLMath languages from the viewpoint of designers. It is intended to accelerate the standardization of a mathematical algorithm design language and to help establish a new and good system modeling and verification environment.